Logic built-in-self-test (BIST) is an on-chip test methodology that enables a chip to test itself. LBIST offers a number of benefits, including the elimination of automatic test equipments (ATEs) and at-speed testing of circuits. However, in order to reduce the hardware overhead of storing the fault-free responses on chip, the responses are compressed which makes diagnosis extremely difficult. A diagnosis-friendly LBIST architecture can render LBIST to be more widely adoptable.
In this presentation, we will discuss how invariants are extracted from the fault free responses, which are subsequently used as property monitors. During the test session, if any property is violated then the failing vector and property number is stored for offline diagnosis. Experimental results have shown that the architecture is able to achieve diagnosis resolution similar to that in a non-BIST setup
Michael S. Hsiao is a professor in the Department of Electrical and Computer Engineering at Virginia Tech. He received the B.S. degree in Computer Engineering (highest honors) and the M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1992, 1993 and 1997, respectively. He is a recipient of the Digital Equipment Corporation Fellowship, the McDonnell Douglas Scholarship, and the National Science Foundation CAREER Award. Among his publications, he has been recognized for the most influential papers in the first ten years (1998-2007) of Design Automation and Test Conference in Europe (DATE), best paper award at the 2010 IEEE Asian Test Symposium, and best student paper award at the 2012 IEEE International Test Conference. His current research interests include design, testing, verification, and trust of hardware and software. He is a Fellow of IEEE.