主講人：Professor James C. Hoe
Despite their promise in both processing performance and efficiency, today's FPGAs remain poorly matched to serve as computing devices. This is especially noticeable in their lack of an appropriate native memory architecture. The CoRAM (Connected RAM) project has been rethinking the FPGA architecture from scratch for a new generation of first-class reconfigurable computing devices. This talk will present the CoRAM FPGA architecture and its high-level memory abstraction that serves as a portable, high-performance bridge between the distributed in-fabric computation kernels and the off-chip DRAM. The talk will discuss a current effort to support the CoRAM abstraction on the hardware of near-term commercially available FPGAs. Please see the CoRAM project page (http://www.ece.cmu.edu/~coram) for more information including online demos and tutorials.
James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University. He received his Ph.D. in EECS from Massachusetts Institute of Technology in 2000 (S.M., 1994). He received his B.S. in EECS from UC Berkeley in 1992. He is interested in many aspects of computer architecture and digital hardware design, including the specific areas of FPGA architecture for computing; digital signal processing hardware; and high-level hardware design and synthesis. He co-directs the Computer Architecture Lab at Carnegie Mellon (CALCM) and is affiliated with the Center for Silicon System Implementation (CSSI). He is a Fellow of IEEE. For more information, please visit http://www.ece.cmu.edu/~jhoe.